Design-Reuse

PLDA Furthers Its PCIe Industry Leadership with the Introduction of the World's First PCI Express 3.0-Based IP for ASIC and FPGA

PLDA’s XpressRich3 IP will be available for review at the PCI-SIG® Developers Conference, June 23-24, 2010 SAN JOSE, Calif. (June 7, 2010) — PLDA, the industry leader in the PCI Express® and ...
Design-Reuse

Introduction of Precoding in PCIe 6.0

What Is Precoding in PCIe? With higher speed introduced from PCIe 5.0, high 32.0 GT/s insertion loss target (-36dB) leads to a higher DFE tap ratio which, in turn ...
Semiconductor Engineering

Why Are Automotive SoC Designers Turning To PCI Express 6.0?

Just over two decades ago, the introduction of PCI Express 1.0 marked the industry’s transition from then-ubiquitous parallel to serial interfaces. Back in 2002, the potential of “PCIe” in automotive ...