Abstract: Achieving the necessary high bandwidth with heavy load while maintaining good linearity poses big challenges to the input buffer design. This paper presents a wideband input buffer for a 4 ...
Abstract: A 250 MS/s 2x interleaved 11 bit pipelined SAR ADC in 40 nm digital CMOS is presented. Each ADC channel consists of a 6b coarse SAR, a dynamic residue amplifier and a 7b fine SAR with a ...
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