GitHub

FPGA MNIST Vision Transformer (ViT) — Basys 3 / Artix-7

A personal hobby project exploring an end-to-end training-to-silicon flow for a small Vision Transformer. This repository contains a synthesizable Vision Transformer (ViT) inference accelerator ...
IEEE

Design and Implementation of 5-Stage Pipelined RISC-V Processor on FPGA

Abstract: This paper presents the design and implementation of a 32-bit, in-order, 5-stage pipelined RISC-V processor, executed on the Basys 3 Artix-7 FPGA. RISC-V, an open-source Instruction Set ...
IEEE

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface

Abstract: Traditional proportional integral derivative (PID) falls short for precise control of DC motor speed under changing conditions. This paper presents a novel FPGA based IP (intellectual ...