IEEE

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface

Abstract: Traditional proportional integral derivative (PID) falls short for precise control of DC motor speed under changing conditions. This paper presents a novel FPGA based IP (intellectual ...
IEEE

FFT implementation and optimization on FPGA

Abstract: Nowadays, the development of the Fast Fourier Transform (FFT) remains of a great importance due to its substantial role in the field of signal processing and imagery. This latter still ...
GitHub

An FPGA Accelerator for Transformer Inference

We accelerated a BERT layer across two FPGAs, partitioned into four pipeline stages. We conduct three levels of optimization using Vitis HLS and report runtimes. The accelerator implements a ...